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????????????????????????????????????????????????????????????????? maxim integrated products 1 simplified operating circuit 19-6008; rev 2; 4/12 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to: www.maxim-ic.com/max17047.related modelgauge is a trademark of maxim integrated products, inc. general description the max17047/max17050 incorporate the maxim modelgauge? m3 algorithm that combines the excellent short-term accuracy and linearity of a coulomb counter with the excellent long-term stability of a voltage-based fuel gauge, along with temperature compensation to provide industry-leading fuel-gauge accuracy. modelgauge m3 cancels offset accumulation error in the coulomb counter, while providing better short-term accuracy than any purely voltage-based fuel gauge. additionally, the modelgauge m3 algorithm does not suffer from abrupt corrections that normally occur in coulomb-counter algorithms, since tiny continual corrections are distributed over time. the device automatically compensates for aging, tem - perature, and discharge rate and provides accurate state of charge (soc) in mah or %, as well as time-to-empty over a wide range of operating conditions. the device provides two methods for reporting the age of the bat - tery: reduction in capacity and cycle odometer. the device provides precision measurements of current, voltage, and temperature. temperature of the battery pack is measured using an external thermistor supported by ratiometric measurements on an auxiliary input. a 2-wire (i 2 c) interface provides access to data and control registers. the max17047 is available in a lead(pb)-free, 3mm x 3mm, 10-pin tdfn package. the max17050 is available in a 0.4mm pitch 9-bump wlp package. applications features s accurate battery-capacity and time-to-empty estimation ? temperature, age, and rate compensated ? does not require empty, full, or idle states to maintain accuracy s precision measurement system ? no calibration required s modelgauge m3 algorithm ? long-term influence by voltage fuel gauge cancels coulomb-counter drift ? short-term influence by coulomb counter provides excellent linearity ? adapts to cell characteristics s external temperature-measurement network ? actively switched thermistor resistive divider reduces current consumption s low quiescent current ? 25a active, < 0.5a shutdown s alert indicator for soc, voltage, temperature, and battery removal/insertion events s atrate estimation of remaining capacity s 2-wire (i 2 c) interface s tiny, lead(pb)-free, 3mm x 3mm, 10-pin tdfn package or tiny 0.4mm pitch 9-bump wlp package 2.5g/3g/4g wireless handsets smartphones/pdas tablets and handheld computers portable game players e-readers digital still and video cameras portable medical equipment 0.1f 0.1f optional 10nf optional 10ki pk- pk+ t optional 10ki ntc thermistor 10mi rsns csp reg ain scl thrm v batt v tt (max17047 only) csn ep sda alrt max17047 max17050 protection system battery pack host p max17047/max17050 modelgauge m3 fuel gauge for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com.
????????????????????????????????????????????????????????????????? maxim integrated products 2 max17047/max17050 modelgauge m3 fuel gauge v batt , sda, scl, alrt to csp ............................. -0.3v to +6v reg to csp .......................................................... -0.3v to +2.2v v tt to csp ............................................................... -0.3v to +6v thrm, ain to csp ..................................... -0.3v to (v tt + 0.3v) csn to csp ................................................................ -2v to +2v continuous sink current (v tt ) ........................................... 20ma continuous sink current (scl, sda, alrt) ...................... 20ma continuous power dissipation (t a = +70 n c) tdfn (derate 24.4mw/ n c above +70 n c) .............. .1951.2mw wlp (derate 11.9mw/ n c above +70 n c) .................. .952.0mw operating temperature range .......................... -40 n c to +85 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -55 n c to +125 n c lead temperature (soldering 10s) ................................. +300 n c soldering temperature (reflow) ...................................... +260 n c absolute maximum ratings electrical characteristics (v batt = 2.5v to 4.5v, t a = -20 n c to +70 n c , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) tdfn junction-to-ambient thermal resistance ( q ja ) .......... 41c/w junction-to-case thermal resistance ( q jc ) ................. 9c/w wlp junction-to-ambient thermal resistance ( q ja ) .......... 84c/w note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . package thermal characteristics (note 1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter symbol conditions min typ max units supply voltage v batt (note 2) 2.5 4.5 v supply current i dd0 shutdown mode, t a p +50 n c 0.5 2 f a i dd1 active mode, average current 25 42 reg regulation voltage v reg 1.5 1.9 v measurement error, v batt v gerr t a = +25 n c -7.5 +7.5 mv -20 +20 measurement resolution, v batt v lsb 0.625 mv v batt measurement range v fs 2.5 4.98 v input resistance csn, ain 15 m i ratiometric measurement accuracy, ain t gerr -0.5 +0.5 % ratiometric measurement resolution, ain t lsb 0.0244 % full scale current register resolution i lsb 1.5625 f v current full-scale magnitude i fs q 51.2 mv current offset error i oerr q 1.5 f v current gain error i gerr -1 +1 % of reading time-base accuracy t err v dd = 3.6v at t a = +25 n c -1 +1 % t a = 0 n c to +50 n c -2.5 +2.5 t a = -20 n c to +70 n c -3.5 +3.5
????????????????????????????????????????????????????????????????? maxim integrated products 3 max17047/max17050 modelgauge m3 fuel gauge electrical characteristics ( continued ) (v batt = 2.5v to 4.5v, t a = -20 n c to +70 n c , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) electrical characteristics (2-wire interface) (2.5v p v batt p 4.5v, t a = -20 n c to +70 n c .) (note 1) parameter symbol conditions min typ max units thrm output drive i out = 0.5ma v tt - 0.1 v thrm precharge time t pre 8.48 ms sda, scl, alrt input logic high v ih 1.5 v sda, scl, alrt input logic low v il 0.5 v sda, alrt output logic low v ol i ol = 4ma 0.4 v sda, alrt pulldown current i pd active mode, v sda = 0.4v, v alrt = 0.4v 0.05 0.2 0.4 f a alrt leakage 1 f a thrm operating range 2.5 v tt v battery-removal detection thresholdv ain rising v detr v thrm - v ain 40 125 200 mv battery-removal detection thresholdv ain falling v detf v thrm - v ain 70 150 230 mv battery-removal detection comparator delay t toff v ain step from 70% to 100% of v thrm to alrt falling; alrtp = logic 0; enain = logic 1; fthrm = logic 1 100 f s external ain capacitance r thm = 10k i ntc 100 nf parameter symbol conditions min typ max units scl clock frequency f scl (note 3) 0 400 khz bus free time between a stop and start condition t buf 1.3 f s hold time (repeated) start condition t hd:sta (note 4) 0.6 f s low period of scl clock t low 1.3 f s high period of scl clock t high 0.6 f s setup time for a repeated start condition t su:sta 0.6 f s data hold time t hd:dat (notes 5, 6) 0 0.9 f s data setup time t su:dat (note 5) 100 ns rise time of both sda and scl signals t r 20 + 0.1c b 300 ns
????????????????????????????????????????????????????????????????? maxim integrated products 4 i 2 c bus timing diagram figure 1. i 2 c bus timing diagram note 1: specifications are 100% tested at t a = +25c. limits over the operating range are guaranteed by design and characterization. note 2: all voltages are referenced to csp. note 3: timing must be fast enough to prevent the device from entering shutdown mode due to bus low for a period > 45s minimum. note 4: f scl must meet the minimum clock low time plus the rise/fall times. note 5: the maximum t hd:dat has only to be met if the device does not stretch the low period (t low ) of the scl signal. note 6: this device internally provides a hold time of at least 100ns for the sda signal (referred to the minimum vih of the scl signal) to bridge the undefined region of the falling edge of scl. note 7: filters on sda and scl suppress noise spikes at the input buffers and delay the sampling instant. note 8: c b total capacitance of one bus line in pf. electrical characteristics (2-wire interface) ( continued ) (2.5v p v batt p 4.5v, t a = -20 n c to +70 n c .) (note 1) parameter symbol conditions min typ max units fall time of both sda and scl signals t f 20 + 0.1c b 300 ns setup time for stop condition t su:sto 0.6 f s spike pulse widths suppressed by input filter t sp (note 7) 0 50 ns capacitive load for each bus line c b (note 8) 400 pf scl, sda input capacitance c bin 60 pf sda scl t f t low t hd:sta t hd:dat t su:sta t su:sto t su:dat t hd:sta t sp t r t buf t r t f ss r p s max17047/max17050 modelgauge m3 fuel gauge
????????????????????????????????????????????????????????????????? maxim integrated products 5 typical operating characteristics (t a = +25c, unless otherwise noted.) shutdown current vs. supply voltage max17047 toc01 v batt (v) shutdown current (ua) 5 4 1 2 3 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 0 t a = +70c t a = +25c t a = -20c active current vs. supply voltage max17047 toc02 v batt (v) active current (ua) 5 4 3 2 1 5 10 15 20 25 30 35 0 0 t a = +25c t a = +70c t a = -20c voltage adc error vs. temperature and supply voltage max17047 toc03 v batt (v) voltage adc error (mv) 4.2 3.7 3.2 2.7 -8 -6 -4 -2 0 2 4 6 8 10 -10 2.2 t a = -20c t a = +70c t a = +25c current adc error vs. temperature max17047 toc04 current forced (a) current adc error (ma) 1 0 -1 -10 -50 0 5 10 15 -15 -2 2 t a = +25c t a = +70c t a = -20c response to temperature transient at constant-current load max17047 toc06 time (hr) soc (%), temperature (c) 3 2 1 10 20 30 40 50 60 70 80 90 100 0 v cell (v) 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 2.4 0 v cell rises with temperature during constant load fuel gauge changes trajectory after temperature change empty voltage soc rep soc av temperature auxiliary input adc error vs. temperature max17047 toc05 ain ratio to v tt (%) auxiliary input adc error (%) 90 80 60 70 20 30 40 50 10 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 100 t a = +25c t a = -20c t a = +70c end of charge detection max17047 toc07 time (hr) capacity (mah); current (ma) 6 4 2 -1 0 1 2 3 4 5 6 7 8 -2 08 fullcap v cell (v) 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 2.7 valid end-of-charge detection event remcap rep v cell near-full false charge termination events rejected current max17047/max17050 modelgauge m3 fuel gauge
????????????????????????????????????????????????????????????????? maxim integrated products 6 typical operating characteristics (continued) (t a = +25c, unless otherwise noted.) cold discharge (0c) max17047 toc08 time (hr) state of charge (%) 8 6 4 2 10 20 30 40 50 60 70 80 90 100 0 01 0 error (%) -8 -6 -4 -2 0 2 4 6 8 10 -10 reference soc soc rep error charge and discharge at +20c time (hr) state of charge (%) error (%) 10 5 10 20 30 40 50 60 70 80 90 100 0 -8 -6 -4 -2 0 2 4 6 8 10 -10 01 5 error max17047 toc10 c/2 discharge soc rep reference soc c/4 discharge c/ 7 discharge c/9 discharge discharge at +40c max17047 toc09 time (hr) state of charge (%) 8 6 4 2 10 20 30 40 50 60 70 80 90 100 0 01 0 error (%) -8 -6 -4 -2 0 2 4 6 8 10 -10 c/4 discharge c/7 discharge c/9 discharge reference soc soc rep error charge and discharge in actual system time (hr) state of charge (%) or temperature (c) v cell (v ) 10 5 10 20 30 40 50 60 70 80 90 100 0 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 3.2 0 v cell reference soc (%) max17047 toc11 soc rep (%) temperature max17047/max17050 modelgauge m3 fuel gauge
????????????????????????????????????????????????????????????????? maxim integrated products 7 max17047/max17050 modelgauge m3 fuel gauge pin/bump descriptions pin/bump configurations bump pin name function wlp tdfn 1 v tt supply input for thermistor bias switch (max17047 only.) v tt is connected internally to v batt on the max17050. connect to supply for ratiometric ain pin-voltage measurements. in most applications, connect v tt to v batt . a1 2 ain auxiliary voltage input. auxiliary voltage input from external thermal-measurement network. ain also provides battery insertion/removal detection. connect to v batt , if not used. a2 3 scl serial clock input. 2-wire clock line. input only. c1 4 sda serial data input/out. 2-wire data line. open-drain output driver. a3 5 csn sense resistor connection. system ground connection and sense resistor input. c3 6 csp chip ground and sense resistor input b3 7 reg voltage regulator bypass. connect a 0.1 f f capacitor from reg to csp. b2 8 alrt alert indication. an open-drain n-channel output used to indicate specified condition thresholds have been met. a 200k i pullup resistor to power rail is required for use as an output. alternatively, alrt can operate as a shutdown input with the output function disabled. c2 9 thrm thermistor bias connection. supply for thermistor resistor-divider. connect to the high side of the thermistor/resistor-divider. thrm connects internally to v tt during temperature measurement. b1 10 v batt power-supply and battery voltage-sense input. kelvin connect to positive terminal of battery pack. bypass with a 0.1 f f capacitor to csp. ep exposed pad (tdfn only). connect to csp. 1 3 4 10 8 7 v batt alrt reg v tt scl sda max17047 29 thrm ain 56 csp csn tdfn top view + ep wlp max17050 + ain 1 a b c 23 v batt sda thrm csp alrt reg csn scl
????????????????????????????????????????????????????????????????? maxim integrated products 8 max17047/max17050 modelgauge m3 fuel gauge block diagram detailed description the max17047/max17050 incorporate the maxim modelgauge m3 algorithm that combines the excellent short-term accuracy and linearity of a coulomb counter with the excellent long-term stability of a voltage-based fuel gauge, along with temperature compensation to pro - vide industry-leading fuel-gauge accuracy. modelgauge m3 cancels offset accumulation error in the coulomb counter, while providing better short-term accuracy than any purely voltage-based fuel gauge. additionally, the modelgauge m3 algorithm does not suffer from abrupt corrections that normally occur in coulomb-counter algo - rithms, since tiny continual corrections are distributed over time. the device automatically compensates for aging, tem - perature, and discharge rate and provides accurate state-of-charge (soc) in mah or % over a wide range of operating conditions. the device provides two methods for reporting the age of the battery: reduction in capacity and cycle odometer. the device provides precision measurements of current, voltage, and temperature. temperature of the battery pack is measured using an external thermistor supported by ratiometric measurements on an auxiliary input. a 2-wire (i 2 c) interface provides access to data and control registers. the max17047 is available in a 3mm x 3mm, 10-pin tdfn package. the max17050 is available in a 0.4mm pitch 9-bump wlp package. modelgauge m3 algorithm the modelgauge m3 algorithm combines a high-accura - cy coulomb counter with a voltage fuel gauge (vfg) as represented in figure 2 . classical coulomb-counter-based fuel gauges have excellent linearity and short-term performance. however, they suffer from drift due to the accumulation of the offset error in the current-sense measurement. although the offset error is often very small, it cannot be eliminated, causes the reported capacity error to increase over time, and requires periodic corrections. corrections are usually performed at full or empty. some other systems also use the relaxed battery voltage to perform correc - tions. these systems determine the soc based on the battery voltage after a long time of no current flow. both have the same limitation: if the correction condition is not 0.1f pk- pk- csp pk- pk- system ground pk+ pk+ 10nf 0.1f 10mi rsns 32khz oscillato r ocv calculation modelgauge m3 algorithm 2v ld o v batt v batt reg p sda alrt scl v tt (max17047 only) thrm v thrm - v detr /v detf battery removal ref detect csp csn ain in out mux 12-bit adc i 2 c interface ref adc max17047 max17050
????????????????????????????????????????????????????????????????? maxim integrated products 9 max17047/max17050 modelgauge m3 fuel gauge observed over time in the actual application, the error in the system is boundless . the performance of classic coulomb counters is dominated by the accuracy of such corrections. classical voltage-measurement-based soc estimation has poor accuracy due to inadequate cell modeling, but does not accumulate offset error over time. the device includes an advanced vfg, which estimates open-circuit voltage (ocv), even during current flow, and simulates the nonlinear internal dynamics of a lithium-ion (li+) battery to determine the soc with improved accu - racy. the model considers the time effects of a battery caused by the chemical reactions and impedance in the battery to determine soc based on table lookup. this soc estimation does not accumulate offset error over time. the modelgauge m3 algorithm combines a high-accu - racy coulomb counter with a vfg. the complementary combined result eliminates the weaknesses of both the coulomb counter and the vfg, while providing the strengths of both. a mixing algorithm combines the vfg capacity with the coulomb counter and weighs each result so that both are used optimally to determine the battery state. in this way, the vfg capacity result is used to continuously make small adjustments to the battery state, canceling the coulomb-counter drift. the modelgauge m3 algorithm uses this battery state information and accounts for temperature, battery cur - rent, age, and application parameters to determine the remaining capacity available to the system. the modelgauge m3 algorithm continually adapts to the cell and application through independent learning rou - tines. as the cell ages, its change in capacity is monitored and updated and the vfg dynamics adapt based on cell- voltage behavior in the application. figure 2. modelgauge m3 overview empt y detectio n curren t time relaxed cell detectio n capacity lear n mah per % voltage fuel gauge current temperature coulomb counter mah output mixing algorith m mah output remcap mi x so c mi x applicatio n empt y compensation end-of-charg e detectio n applicatio n outputs: cell chemistr y outputs: so c re p remcap re p so c av remcap av tte fullcap ocv cycles r cell fullcapnom ag e ocv temperature- compensation lear n voltage ocv table lookup % remaining output ocv calculatio n ocv output
???????????????????????????????????????????????????????????????? maxim integrated products 10 max17047/max17050 modelgauge m3 fuel gauge figure 4. modelgauge m3 algorithm mixing conceptual illustration ocv estimation and coulomb-count mixing the core of the modelgauge m3 algorithm is a mixing algorithm that combines the ocv state estimation with the coulomb counter. after power-on reset of the ic, coulomb-count accuracy is unknown. the ocv state estimation is weighted heavily compared to the coulomb- count output. as the cell progresses through cycles in the application, coulomb-counter accuracy improves and the mixing algorithm alters the weighting so that the coulomb-counter result is dominant. from this point forward, the ic switches to servo mixing. servo mixing provides a fixed magnitude continuous error correction to the coulomb count, up or down, based on the direction of error from the ocv estimation. this allows differences between the coulomb count and ocv estimation to be corrected quickly. see figure 3 . the resulting output from the mixing algorithm does not suffer drift from current measurement offset error and is more stable than a stand-alone ocv estimation algorithm; see figure 4 . initial accuracy depends on the relaxation state of the cell. the highest initial accuracy is achieved with a fully relaxed cell. fuel-gauge empty compensation as the temperature and discharge rate of an applica - tion changes, the amount of charge available to the applica tion also changes. the modelgauge m3 algo - rithm dis tinguishes between remaining capacity of the cell (remcap mix ) and remaining capacity of the appli - cation (remcap av ) and reports both results to the user. fuel-gauge learning the devi ce periodically makes internal adjustments to cell characterization and application information to remove initial error and maintain accuracy as the cell ages. these adjustments always occur as small under - corrections to prevent instability of the system and prevent any noticeable jumps in the fuel-gauge outputs. learning occurs automatically without any input from the host. to maintain learned accuracy through power loss, the host must periodically save learned information and then restore after power is returned. see the power-up and power-on reset section for details: ? full capacity available to application (fullcap). this is the total capacity available to the application at full. fullcap is updated near the end of charging when termination is detected. see the end-of-charge detection section. figure 3. modelgauge m3 ocv and coulomb-count mixing cell cycles ocv and coulomb-count mixing ratio 1.50 1.00 0.50 0 0% 100% 2.00 coulomb-count influenc e servo mixing oc v influenc e time state-of-charge error (shaded area) modelgauge m3 ocv + coulomb-count mixing maximum error range maximum coulomb-counter error typical ocv estimation error as cell is cycled
???????????????????????????????????????????????????????????????? maxim integrated products 11 max17047/max17050 modelgauge m3 fuel gauge ? cell capacity (fullcapnom). this is the total cell capacity at full, according to the vfg. this includes some capacity that is not available to the application at high loads and/or low temperature. the device periodically compares percent change based on ocv measurement vs. coulomb-count change as the cell charges and discharges. this information allows the device to maintain an accurate estimation of the cells capacity in mah as the cell ages. ? voltage fuel-gauge adaptation. the device observes the batterys relaxation response and adjusts the dynamics of the vfg. this adaptation adjusts the rcomp0 register during qualified cell relaxation events. ? empty compensation. the device updates inter - nal data whenever cell empty is detected ( v cell < v?empty ) to account for cell age or other cell devia - tions from the characterization information. determining fuel-gauge accuracy to determine the true accuracy of a fuel gauge, as expe - rienced by end users, the battery should be exercised in a dynamic manner. the end-user accuracy cannot be understood with only simple cycles. to challenge a correction-based fuel gauge, such as a coulomb counter, test the battery with partial loading sessions. for example, a typical user may operate the device for 10min and then stop use for an hour or more. a robust test method includes these kinds of sessions many times at various loads, temperatures, and duration. refer to application note 4799: cell characterization procedure for a modelgauge m3 fuel gauge . initial accuracy the device uses the first voltage reading after power-up or after cell insertion to determine the starting output of the fuel gauge. it is assumed that the cell is fully relaxed prior to this reading; however, this is not always the case. if the cell was recently charged or discharged, the voltage measured by the device may not represent the true state of charge of the cell, resulting in initial error in the fuel gauge outputs. in most cases, this error is minor and is quickly removed by the fuel gauge algorithm dur - ing normal operation. typical operating circuit the device is designed to mount outside the cell pack that it monitors. voltage of the battery pack is measured directly at the pack terminals by the v batt and csp connections. current is measured by an external sense resistor placed between the csp and csn pins. an external resistor-divider network allows the device to measure temperature of the cell pack by monitoring the ain pin. the thrm pin provides a strong pullup for the resistor-divider that is internally disabled when tempera - ture is not being measured. communication to the host occurs over a standard i 2 c interface. scl is an input from the host, and sda is an open-drain i/o pin that requires an external pullup. the alrt pin is an output that can be used as an external interrupt to the host processor if certain application con - ditions are detected. alrt can also function as an input, allowing the host to shut down the device. this pin is also open drain and requires an external pullup resistor. figure 5 is the typical operating circuit. multicell circuit the max17047 can be used in multicell pack applica - tions. a resistor-divider network divides the pack voltage down so that the ic monitors the equivalent voltage of a single cell. the max9910 buffers the divider output so that loading by the max17047 does not affect accuracy. v tt must be connected to a regulated supply in the sys - tem to prevent overloading the max9910. contact the factory for a max17050 multicell application circuit. see figure 6 . thermistor sharing circuit the max17047 can share the cell thermistor circuit with the system charger. in this circuit, there is a single thermistor inside the cell pack and a single bias resistor external to the cell pack. the device shares the same external bias as the charger circuit and measurement point on the thermistor. in this configuration, each device can measure temperature individually or simultaneously without interference. alternatively, if the bias voltage in the charger circuit is not available to the device, a sepa - rate bias voltage on the v tt pin can be used. for proper operation, the separate bias voltage must be larger than the minimum operating voltage of the device, but no larger than one diode drop above the charger circuit bias voltage. the max17050 cannot be operated in his configuration. see figure 7 .
???????????????????????????????????????????????????????????????? maxim integrated products 12 max17047/max17050 modelgauge m3 fuel gauge figure 5. typical operating circuit figure 6. multicell application circuit 0.1f 0.1f optional 10nf optional 10ki pk- pk+ t optional 10ki ntc thermistor 10mi rsns csp reg ain scl thrm v batt v tt (max17047 only) csn ep sda alrt max17047 max17050 optional 200ki optional 5ki system battery pack host p protection ic thermistor measurement optional max17047 3.3nf 4.5v-5.5v regulator system max9910 0.1f optional 10ki optional 200ki system ground 10mi optional 5ki optional 10nf thrm alrt v tt ain vb csp ep 0.1f v batt pk- t pk- pk+ 1mi n-1 mi pk- 100i 47ki sda scl csn battery pack cell n cell 1 optional 10k ntc thermistor protector host p
???????????????????????????????????????????????????????????????? maxim integrated products 13 max17047/max17050 modelgauge m3 fuel gauge figure 7. operating circuits that share pack thermistor with system charger recommended layout proper circuit layout (see figure 8 ) is essential for measurement accuracy when using the max17047/ max17050 modelgauge m3 ics. the recommended layout guidelines are as follows: 1) mount r sns as close as possible to pack-. the device shares both voltage and current measure - ments on the csp pin. therefore, it is important to limit the amount of trace resistance between the current- sensing resistor and pack-. 2) v batt trace should make a kelvin connection to pack+. the device shares the v batt pin for both voltage measurement and ic power. limiting the voltage loss through this trace is important to voltage- measurement accuracy. pcb resistance that cannot be removed can be compensated for during charac - terization of the application cell. 3) csn and csp traces should make kelvin connections to r sns . the device measures current differentially through the csn and csp pins. any shared high- current paths on these traces will affect current- measurement gain accuracy. pcb resistance that cannot be removed can be compensated for during characterization of the application cell. 4) v batt capacitor trace loop area should be minimized. the device shares the v batt pin for both voltage mea - surement and ic power. limiting noise at the v batt pin is important to current-measurement accuracy. 5) reg capacitor trace loop area should be minimized. the helps filter any noise from the internal regulated supply. 6) there are no limitations on any other ic connection. connections to thrm, alrt, sda, scl, v tt , and ain, as well as any external components mounted to these pins, have no special layout requirements. max17047 voltage base d on existing charger requirement s v bias v system v batt thermistor inside cell pack max17047 + charger with external bias pk- pk- charger with v tt + thrm available pp v tt thrm csp ain max17047 v bias 2.8v < v bias < v internal + 0.6v v system v batt thermistor inside cell pack max17047 + charger with internal bias charger with internal bias p v tt thrm csp ain v internal on durin g charge off durin g discharg e
???????????????????????????????????????????????????????????????? maxim integrated products 14 max17047/max17050 modelgauge m3 fuel gauge modelgauge m3 registers to calculate accurate results, modelgauge m3 requires information about the cell, the application, and real-time information measured by the device. figure 9 shows all inputs and outputs to the algorithm grouped by category. analog input registers are the real-time measurements of voltage, temperature, and current performed by the device. application-specific registers are programmed by the customer to reflect the operation of the applica - tion. the cell characterization information registers hold characterization data that models the behavior of the cell over the operating range of the application. the algorithm configuration registers allow the host to adjust performance of the device for its application. the save and restore registers allow an application to maintain accuracy of the algorithm after the device has been power cycled. the following sections describe each register in detail. modelgauge algorithm output registers the following registers hold the output results from the modelgauge m3 algorithm. soc mix register (0dh) the soc mix register holds the calculated present state of charge of the cell before any empty compensation adjustments are performed. the register value is stored as a percentage with a resolution of 0.0039% per lsb. if an 8-bit state-of-charge value is desired, the host can discard the lower byte and use only the upper byte of the register with a resolution of 1.0%. figure 10 shows the soc mix register format. figure 8. proper board layout max17050 positive power bus positive power bus negative power bus negative power bus sda v batt ain thrm alrt scl csp reg csn pack+ pack+ v batt v tt ain scl sda csn thrm alrt reg reg csp c reg ep r sns r sns c vbatt c vbatt pack- pack- + c reg max17047
???????????????????????????????????????????????????????????????? maxim integrated products 15 max17047/max17050 modelgauge m3 fuel gauge figure 9. modelgauge m3 register map figure 10. soc mix register format (output) modelgauge algorith m v cell current temperatur e averagev cell averagecurren t averagetemperatur e filtercf g learncfg relaxcf g misccf g atrate algorithm configuration fullcapnom iavg_empty cell characterization information rcomp0 tempco tempno m templi m v_empty characterization tabl e fctc qresidual table analog inputs designcap ichgterm fullsocthr v_empty application specific fullca p fullcapnom fstat remcap mix so c rep remcap re p so c av remcap av tte ag e cycles oc v so c mix modelgauge algorithm outputs cycles rcomp 0 tempco dqac c dpacc fullca p save and restore information qresidual table msbaddress 0dh lsbaddress 0dh 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 -8 units: 0.0039% 2 0 units: 1.0%
???????????????????????????????????????????????????????????????? maxim integrated products 16 max17047/max17050 modelgauge m3 fuel gauge remcap mix register (0fh) the remcap mix register holds the calculated remain - ing capacity of the cell before any empty compensation adjustments are performed. the value is stored in terms of f vh and must be divided by the application sense- resistor value to determine remaining capacity in mah. figure 11 shows the remcap mix register format. soc rep register (06h) soc rep is a filtered version of the soc av register that prevents large jumps in the reported value caused by changes in the application such as abrupt changes in load current. the register value is stored as a percent - age with a resolution of 0.0039% per lsb. if an 8-bit soc value is desired, the host can discard the lower byte and use only the upper byte of the register with a resolution of 1.0%. figure 12 shows the soc rep register format. remcap rep register (05h) remcap rep is a filtered version of the remcap av register that prevents large jumps in the reported value caused by changes in the application such as abrupt changes in load current. the value is stored in terms of f vh and must be divided by the application sense-resistor value to determine remaining capacity in mah. during application idle periods where the averagecurrent register value is less than q 6 lsbs, remcap rep does not change. the measured cur - rent during this period is still accumulated into remcap mix and is slowly reflected in remcap rep once cell loading or charging occurs. figure 13 shows the remcap rep register format. figure 11. remcap mix register format (output) figure 12. soc rep register format (output) figure 13. remcap rep register format (output) msbaddress 0fh lsbaddress 0fh 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i ) msbaddress 06h lsbaddress 06h 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 -8 units: 0.0039% 2 0 units: 1.0% msbaddress 05h lsbaddress 05h 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i )
???????????????????????????????????????????????????????????????? maxim integrated products 17 max17047/max17050 modelgauge m3 fuel gauge soc av register (0eh) the soc av register holds the calculated present state of charge of the cell based on all inputs from the modelgauge m3 algorithm including empty compensa - tion. the register value is stored as a percentage with a resolution of 0.0039% per lsb. if an 8-bit state-of-charge value is desired, the host can discard the lower byte and use only the upper byte of the register with a resolution of 1.0%. the soc av register value is an unfiltered calcula - tion. jumps in the value can be caused by changes in the application such as abrupt changes in load current. figure 14 shows the soc av register format. remcap av register (1fh) the remcap av register holds the calculated remain - ing capacity of the cell based on all inputs from the modelgauge m3 algorithm including empty compen - sation. the value is stored in terms of f vh and must be divided by the application sense-resistor value to determine the remaining capacity in mah. the register value is an unfiltered calculation. jumps in the value can be caused by changes in the application such as abrupt changes in load current. figure 15 shows the remcap av register format. soc vf register (ffh) the soc vf register holds the calculated present soc of the battery according to the voltage fuel gauge. the reg - ister value is stored as a percentage with a resolution of 0.0039% per lsb. if an 8-bit soc value is desired, the host can discard the lower byte and use only the upper byte of the register with a resolution of 1.0%. figure 16 shows the soc vf register format. tte register (11h) the tte register holds the estimated time to empty for the application under present conditions. the tte value is determined by dividing the remcap av register by the averagecurrent register. the result is stored in the tte register with a resolution of 5.625s per lsb. figure 14. soc av register format (output) figure 15. remcap av register format (output) figure 16. soc vf register format (output) msbaddress 0eh lsbaddress 0eh 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 -8 units: 0.0039% 2 0 units: 1.0% msbaddress 1fh lsbaddress 1fh 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i ) msbaddress ffh lsbaddress ffh 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 -8 units: 0.0039% 2 0 units: 1.0%
???????????????????????????????????????????????????????????????? maxim integrated products 18 max17047/max17050 modelgauge m3 fuel gauge figure 17. tte register format (output) figure 18. age register format (output) alternatively, the tte register can be used to estimate time to empty for any given current load. whenever the atrate register is programmed to a negative number, representing a discharge current, the tte register displays the estimated time to empty for the application based on the atrate regis - ter value. figure 17 shows the tte register format. age register (07h) the age register contains a calculated percentage value of the applications present cell capacity compared to its expected capacity. the result can be used by the host to gauge the cells health as compared to a new cell of the same type. the result is displayed as a percentage value from 0 to 256% with a 0.0039% lsb. figure 18 shows the age register format. the equation for the register output is: age register = 100% o (fullcap register/ designcap register) cycles register (17h) the cycles register accumulates total percent change in the cell during both charging and discharging. the result is stored as a total count of full charge/discharge cycles. for example, a full charge/discharge cycle results in the cycles register incrementing by 100%. the cycles register has a full range of 0 to 65535% with a 1% lsb. this register is reset to 0% at power-up. to maintain the lifetime cycle count of the cell, this register must be peri - odically saved by the host and rewritten to the device at power-up. see the save and restore registers section for details. see figure 19 for the cycles register format. vfocv register (fbh) the vfocv register contains the raw open-circuit volt - age output of the voltage fuel gauge. this value is used in other internal calculations and can be read for debug purposes. the result is a 12-bit value ranging from 2.5v to 5.119v where 1 lsb is 1.25mv. the bottom 4 bits of this register are dont care bits. see figure 20 for the vfocv register format. figure 19. cycles register format (output) msbaddress 11h lsbaddress 11h 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 msb lsb msb lsb 2 0 units: 3.0min msbaddress 07h lsbaddress 07h 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 0 units: 1.0% 2 -8 units: 0.0039% msbaddress 17h lsbaddress 17h 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 1.0%
???????????????????????????????????????????????????????????????? maxim integrated products 19 max17047/max17050 modelgauge m3 fuel gauge fullcap register (10h) this register holds the modelgauge m3 algorithm calcu - lated full capacity of the cell under best-case conditions (light load, hot). a new full-capacity value is calculated after the end of every charge cycle in the application. the value is stored in terms of f vh and must be divided by the application sense-resistor value to determine capac - ity in mah. figure 21 is the fullcap register format. see the end-of-charge detection section. fullcapnom register (23h) this register holds the calculated full capacity of the cell, not including temperature and charger tolerance. new full capacity values are calculated periodically by the ic during operation. the value is stored in terms of f vh and must be divided by the application sense resistor value to determine capacity in mah. this register is used to calculate the outputs of the modelgauge m3 algorithm and is available to the user only for debug. figure 22 is the fullcapnom register format. figure 20. vfocv register format (output) figure 21. fullcap register format (output) figure 22. fullcapnom register format (output) msbaddress fbh lsbaddress fbh 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 x x x x msb lsb msb lsb 2 0 units: 1.25mv x = dont care msbaddress 10h lsbaddress 10h 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i ) msbaddress 23h lsbaddress 23h 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i )
???????????????????????????????????????????????????????????????? maxim integrated products 20 max17047/max17050 modelgauge m3 fuel gauge qh register (4dh) the qh register displays the raw coulomb count gener - ated by the device. this register is used internally as an input to the mixing algorithm. monitoring changes in qh over time can be useful for debugging device operation. the qh register is set to 0000h at power-up. the qh reg - ister format is shown in figure 23 . application-specific registers the following registers define the behavior of the applica - tion. they must be programmed by the user before the modelgauge m3 algorithm is accurate. any changes to these register values require recharacterization of the cell. designcap register (18h) the designcap register holds the expected capacity of the cell. this value is used to determine age and health of the cell by comparing against the calculated pres - ent capacity stored in the fullcap register. designcap has an lsb equal to 5.0 f vh and a full range of 0 to 327.68mvh. the user should multiply the mah capac - ity of the cell by the sense resistor value to determine the f vh value to store in the designcap register. the designcap register format is shown in figure 24 . fullsocthr register (13h) the fullsocthr register gates detection of end-of- charge. soc vf must be larger than the fullsocthr value before ichgterm is compared to the averagecurrent register value. the recommended fullsocthr register setting for most applications is 95%. see the ichgterm register description for details. the fullsocthr register is 70% at power-up. figure 25 is the fullsocthr register format. figure 23. qh register format (output) figure 24. designcap register format (input) figure 25. fullsocthr register format (input) msbaddress 23h lsbaddress 23h 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i ) msbaddress 4dh lsbaddress 4dh 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i ) msbaddress 18h lsbaddress 18h 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 5.0 f vh/r sense (0.5mah when r sense = 0.010 i )
???????????????????????????????????????????????????????????????? maxim integrated products 21 max17047/max17050 modelgauge m3 fuel gauge end-of-charge detection the device detects the end of a charge cycle when the application current falls into the band set by the ichgterm register value. by monitoring both the current and averagecurrent registers, the device can reject false end-of-charge events such as application load spikes or early charge-source removal. see the end-of-charge detection graph in the typical operating characteristics and figure 26 . figure 26. false end-of-charge events average current current 0ma average current current 1.25 x ichgterm 0.125 x ichgterm 1.25 x ichgterm 0.125 x ichgterm 0ma charging charging discharging discharging high-current load spikes do not generate end-of-charge detection because current and average current readings do not fall into the detection area at the same time. early charger removal does not generate end-of-charge detection because current and average current readings do not fall into the detection area at the same time.
???????????????????????????????????????????????????????????????? maxim integrated products 22 max17047/max17050 modelgauge m3 fuel gauge when a proper end-of-charge event is detected, the device learns a new fullcap register value based on the remcap rep output. if the old fullcap value was too high, it is adjusted downward after the last valid end- of-charge detection. if the old fullcap was too low, it is adjusted upward to match remcap rep . this prevents the calculated state of charge from ever reporting a value greater than 100%. see figure 27 . ichgterm register (1eh) the ichgterm register allows the device to detect when a charge cycle of the cell has completed. the host should set the ichgterm register value equal to the exact charge termination current used in the application. the device detects end of charge if all the following con - ditions are met: ? soc vf > fullsocthr ? and ichgterm x 0.125 < current < ichgterm x 1.25 ? and ichgterm x 0.125 < averagecurrent < ichgterm x 1.25 values are stored in f v. multiply the termination current by the sense resistor to determine the desired register value. this register has the same range and resolution as the current register. figure 28 shows the ichgterm register format. ichgterm defaults to 150ma (03c0h) at power-up. figure 27. fullcap learning at end of charge average current current 0ma average current current 1.25 x ichgterm 0.125 x ichgterm 1.25 x ichgterm 0.125 x ichgterm 0ma charging charging discharging discharging high-current load spikes do not generate end-of-charge detection because current and average current readings do not fall into the detection area at the same time. early charger removal does not generate end-of-charge detection because current and average current readings do not fall into the detection area at the same time.
???????????????????????????????????????????????????????????????? maxim integrated products 23 max17047/max17050 modelgauge m3 fuel gauge v_empty register (3ah) the v_empty register sets thresholds related to empty detection during operation. figure 29 is the v_empty register format. ve 8 :ve 0 empty voltage. sets the voltage level for detecting empty. a 10mv resolution gives a 0 to 5.11v range. this value is written to 3.12v at power-up. vr 6 :vr 0 recovery voltage. sets the voltage level for clearing empty detection. once the cell voltage rises above this point, empty voltage detection is reenabled. a 40mv resolution gives a 0 to 5.08v range. this value is written to 3.68v at power-up. cell characterization information registers proper cell characterization is required to achieve accu - racy. the following registers ( table 1 ) hold information that must be generated through a cell-characterization procedure. maxim provides a cell-characterization ser - vice. contact the factory for details. figure 28. ichgterm register format (input) figure 29. v_empty register format (input) table 1. cell characterization information registers register address characterization table (48 words) 80h to afh fullcap 10h designcap 18h ichgterm 1eh fullcapnom 23h rcomp0 38h lavg_empty 36h tempco 39h qresidual 00 12h qresidual 10 22h qresidual 20 32h qresidual 30 42h msbaddress 1eh lsbaddress 1eh s 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb units: 1.5625 f v/r sense msbaddress 3ah lsbaddress 3ah ve 8 ve 8 ve 6 ve 5 ve 4 ve 3 ve 2 ve 1 ve 0 vr 6 vr 5 vr 4 vr 3 vr 2 vr 1 vr 0 msb lsb msb lsb vr 0 units: 40mv ve 0 units: 10mv
???????????????????????????????????????????????????????????????? maxim integrated products 24 max17047/max17050 modelgauge m3 fuel gauge algorithm configuration registers the following registers allow operation of the modelgauge m3 algorithm to be adjusted for the application. it is recom - mended that the default values for these registers be used. filtercfg register (29h) the filtercfg register sets the averaging time period for all a/d readings, for mixing ocv results and coulomb- count results. it is recommended that these values are not changed unless absolutely required by the applica - tion. figure 30 shows the filtercfg register format: curr3:curr0 sets the time constant for the averagecurrent register. the default por value of 4h gives a time constant of 11.25 seconds. the equation setting the period is: averagecurrent time constant = 175.8ms o 2 (2+curr) volt2:volt0 sets the time constant for the averagev cell register. the default por value of 2h gives a time constant of 45.0s. the equation setting the period is: averagev cell time constant = 175.8ms o 2 (6+volt) mix3:mix0 sets the time constant for the mixing algo - rithm. the default por value of dh gives a time constant of 12.8 hours. the equation setting the period is: mixing period = 175.8ms o 2 (5+mix) temp2:temp0 sets the time constant for the averagetemperature register. the default por value of 1h gives a time constant of 12min. the equation setting the period is: avergetemperature time constant = 175.8ms x 2 (8 + temp) x reserved. do not modify. relaxcfg register (2ah) the relaxcfg register defines how the device detects if the cell is in a relaxed state. see figure 32 . for a cell to be considered relaxed, current flow through the cell must be kept at a minimum while the change in the cells voltage over time, dv/dt, shows little or no change. if averagecurrent remains below the load threshold while v cell changes less than the dv threshold over two consecutive periods of dt, the cell is considered relaxed. figure 31 shows the relaxcfg register format: load6:load0 sets the threshold, which the averagecurrent register is compared against. the averagecurrent register must remain below this thresh - old value for the cell to be considered unloaded. load is an unsigned 7-bit value where 1 lsb = 50 f v. the default value is 800 f v. figure 31. relaxcfg register format (input) figure 30. filtercfg register format (input) msbaddress 2ah lsbaddress 2ah load 6 load 5 load 4 load 3 load 2 load 1 load 0 dv 4 dv 3 dv 2 dv 1 dv 0 dt 3 dt 2 dt 1 dt 0 msb lsb msb lsb load 0 units: 50 f v/r sense (5.0mah when r sense = 0.010 i ) msbaddress 29h lsbaddress 29h x x temp 2 temp 1 temp 0 mix3 mix2 mix1 mix0 volt2 volt1 volt0 curr 3 curr 2 curr 1 curr 0 msb lsb msb lsb
???????????????????????????????????????????????????????????????? maxim integrated products 25 max17047/max17050 modelgauge m3 fuel gauge dv4:dv0 sets the threshold, which v cell is compared against. if the cells voltage changes by less than dv over two consecutive periods set by dt, the cell is considered relaxed; dv has a range of 0 to 40mv where 1 lsb = 1.25mv. the default value is 1.75mv. dt3:dt0 sets the time period over which change in v cell is compared against dv. if the cells voltage changes by less than dv over two consecutive periods set by dt, the cell is considered relaxed. the default value is 6 minutes. the comparison period is calculated as: relaxation period = 2 dt o 0.1758s learncfg register (28h) the learncfg register controls all functions relating to adaptation during operation. the learncfg register default values should not be changed unless specifically required by the application. figure 33 is the learncfg register format: 0 bit must be written 0. do not write 1. 1 bit must be written 1. do not write 0. filt empty empty detect filter. this bit selects whether empty is detected by a filtered or unfiltered voltage read - ing. setting this bit to 1 causes the empty detection algo - rithm to use the averagev cell register. setting this bit to 0 forces the empty detection algorithm to use the v cell register. this bit is written to 0 at power-up. figure 32. cell relaxation detection figure 33. learncfg register format (input/output) dt1 dt2 dt3 dt4 dt5d t6 48 to 96 minutes dv2 dv3 dv4 discharging dv5 dv6 cell unloaded (relaxation begins) relaxation load threshold 0 average current cell voltage first reading below dv/dt threshold second reading below dv/dt threshold cell is relaxe d reldt bit set cell capacity is learned long relaxatio n reldt2 bit se t msbaddress lsbaddress 0 0 1 0 0 1 1 0 0 ls 2 ls 1 ls 0 0 filt empty 1 0 msb lsb msb lsb
???????????????????????????????????????????????????????????????? maxim integrated products 26 max17047/max17050 modelgauge m3 fuel gauge figure 34. misccfg register format (input) ls2:ls0 learn stage. see figure 3 the learn stage value controls the influence of the vfg on the mixing algorithm. at power-up, learn stage defaults to 0h, mak - ing the voltage fuel gauge dominate. learn stage then advances to 7h over the course of two full cell cycles to make the coulomb counter dominate. host software can write the learn stage value to 7h to advance to the final stage at any time. writing any value between 1h and 6h is ignored. learn stage reflects the d5, d6, and d7 bits of the cycles register. update the cycles register to advance to an intermediate state. for example, set cycles = 160% to advance to learn stage 5. misccfg register (2bh) the misccfg control register enables various other functions of the device. the misccfg register default values should not be changed unless specifically required by the application. figure 34 is the misccfg register format: 0 bit must be written 0. do not write 1. 1 bit must be written 1. do not write 0. x dont care. bit may read 0 or 1. sacfg1:sacfg0 soc alert config. soc alerts can be generated by monitoring any of the soc registers as follows. sacfg defaults to 00 at power-up: 0 0 soc alerts are generated based on the soc rep register. 0 1 soc alerts are generated based on the soc av register. 1 0 soc alerts are generated based on the soc mix register. 1 1 soc alerts are generated based on the soc vf register. mr4:mr0 mixing rate. this value sets the strength of the servo mixing rate after the final mixing state has been reached (> 2.08 complete cycles). the units are mr0 = 6.25 f v, giving a range up to 19.375ma with a standard 0.010 i sense resistor. setting this value to 00000b dis - ables servo mixing and the ic continues with time-con - stant mixing indefinitely. the default setting is 18.75 f v or 1.875ma with a standard sense resistor. enbi1 enable reset on battery-insertion detection. set this bit to 1 to force a reset of the fuel gauge whenever a battery insertion is detected based on ain pin monitoring. this bit is written to 1 at power-up. fstat register (3dh) the fstat register is a read-only register that monitors the status of the modelgauge algorithm. do not write to this register location. figure 35 is the fstat register format: reldt relaxed cell detection. this bit is set to a 1 when - ever the modelgauge m3 algorithm detects that the cell is in a fully relaxed state. this bit is cleared to 0 whenever a current greater than the load threshold is detected. see figure 32 . figure 35. fstat register format (output) msbaddress 2bh lsbaddress 2bh 0 0 x x enbi1 0 mr 4 mr 3 mr 2 mr 1 mr 0 1 0 0 sacfg 1 sacfg 0 msb lsb msb lsb mr 0 units: 6.25v msbaddress 3dh lsbaddress 3dh x x x x x x reldt edet x reldt2 x x x x x dnr msb lsb msb lsb
???????????????????????????????????????????????????????????????? maxim integrated products 27 max17047/max17050 modelgauge m3 fuel gauge reldt2 long relaxation. this bit is set to a 1 whenever the modelgauge m3 algorithm detects that the cell has been relaxed for a period of 48 to 96 minutes or longer. this bit is cleared to 0 whenever the cell is no longer in a relaxed state. see figure 32 . dnr data not ready. this bit is set to 1 at cell inser - tion and remains set until the output registers have been updated. afterwards, the ic clears this bit indicating the fuel gauge calculations are now up to date. this takes between 445ms and 1.845s depending on whether the ic was in a powered state prior to the cell-insertion event. edet empty detection. this bit is set to 1 when the ic detects that the cell empty point has been reached. this bit is reset to 0 when the cell voltage rises above the recovery threshold. see the v_empty register for details. x dont care. this bit is undefined and can be logic 0 or 1. atrate register (04h) the atrate register allows host software to estimate remaining capacity, soc, and time to empty for a theo - retical load current. whenever the atrate register is pro - grammed to 0 or a positive value, the device uses a/d measurements for determining the soc av , remcap av , and tte register values. whenever the atrate register is programmed to a negative value indicating a hypotheti - cal discharge current, the soc av , remcap av , and tte registers calculate their values for the atrate register theoretical current instead. the atrate register holds a twos-complement 16-bit value. do not write 8000h to this register. figure 36 shows the atrate register format. power-up and power-on reset any power-on reset (por) of the device resets all memory locations to their default por value. this removes any custom cell characterization and applica - tion data, affects alrt interrupt and shutdown mode set - tings, and resets all learned adjustments made by the fuel gauge. to maintain accuracy of the fuel gauge and reset operation settings of the device, the host must reload all application memory data and restore all learned fuel- gauge information. note that the device may take up to 445ms to completely reset operation after a por event occurs. see figure 37 . saved data should not be restored until after this period is over. the following procedure is recommended: 1) read status register. if por = 0, exit. 2) wait 600ms for por operation to fully complete. 3) restore all application register values. 4) restore fuel gauge learned-value information (see the save and restore registers section). 5) clear por bit. figure 36. atrate register format (input) msbaddress 04h lsbaddress 04h s 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 1.5625 f v/r sense x = dont care
???????????????????????????????????????????????????????????????? maxim integrated products 28 max17047/max17050 modelgauge m3 fuel gauge save and restore registers the device is designed to operate outside the battery pack and can therefore be exposed to power loss when in the application. to prevent the loss of learned informa - tion during power cycles, a save-and-restore procedure can be used to maintain register values in nonvolatile memory external to the device. the registers ( table 2 ) must be stored externally and then rewritten to the device after power-up to maintain a learned state of operation. note that some registers are application outputs, some registers are for internal calculations, and some are characterization setup registers. registers that are not internal are described in their own sections. these values should be stored by the application at periodic intervals. some recommended back-up events are: ? end-of-charge ? end-of-discharge ? prior to application entering shutdown state the host is responsible for loading the default character - ization data at first power-up of the device, and restoring the default characterization data plus learned information on subsequent power-up events. battery removal and insertion the device detects when a cell has been removed or inserted into the application. this allows the device to adjust to the new cell to maintain accuracy. the removal- detection feature also allows the device to quickly warn the host processor through interrupt of impending power loss if enabled. table 2. save and restore registers figure 37. power-up operation register address fullcap 10h cycles 17h rcomp0 38h tempco 39h qresidual 00 12h qresidual 10 22h qresidual 20 32h qresidual 30 42h dqacc 45h dpacc 46h ai n v batt a/ d readings output register s 1.4s until next temperature reading 270m s 175m s cell insertion v batt > v ddmin a/ d measurements complete soc values updated
???????????????????????????????????????????????????????????????? maxim integrated products 29 max17047/max17050 modelgauge m3 fuel gauge detection occurs by monitoring the ain pin voltage com - pared to the thrm pin. whenever a cell is present, the external resistor-divider network sets the voltage of ain. when the cell is removed, the remaining external resistor pulls ain to the thrm pin voltage level. whenever v ain < v thrm - v detf , the device determines that a cell is present in the application. if v ain > v thrm - v detr , the device determines that no cell is present at that time. cell insertion (ic already powered) the device is ready to detect a cell insertion if either the ethrm or fthrm bits of the config register are set to enable the thrm pin output. see figure 38 . when a cell insertion is detected, the fuel gauge is reset and all fuel-gauge outputs are updated to reflect the soc of the newly inserted cell. this process can take up to 1.845s (fthrm = 0) or 620ms (fthrm = 1) from time of inser - tion. note that the device uses the cell voltage as a start - ing point for the fuel gauge. if the cell voltage is not fully relaxed at time of insertion, the fuel gauge begins with some initial error. see the fuel-gauge learning section for details. the host can disable this feature by clearing the enbi1 bit in the misccfg register. the device can also be configured to alert the host when cell insertion occurs. when bei = 1 in the config reg - ister, the device generates an interrupt on the alrt pin at the start of the first temperature conversion after inser - tion. this could take up to 1.4s to occur. this feature is useful if the application uses more than one cell type and the ic must be reconfigured at each insertion. figure 38. operation after cell insertion ai n cell insertion from powered state (fthrm = 0) cell insertion from powered state (fthrm = 1) v batt a/ d readings output register s ai n v batt a/ d readings output register s cell insertion cell insertion detected a/ d measurements complete soc values updated cell insertion cell insertion detected a/ d measurements complete soc values updated up to 1.4s 270m s 175m s up to 175ms 270m s 175m s
???????????????????????????????????????????????????????????????? maxim integrated products 30 max17047/max17050 modelgauge m3 fuel gauge figure 39. fast detection of cell removal cell removal the device detects a cell removal if either the ethrm or fthrm bits of the config register are set to enable the thrm pin output. cell removal does not affect ic opera - tion. the device continues to update fuel-gauge outputs. the host should monitor the br and bst bits of the status register to determine if the fuel-gauge outputs are valid. the device can also be configured to alert the host when cell removal occurs. when ber = 1 in the config regis - ter, the device generates an interrupt on the alrt pin at the start of the first temperature conversion after removal. this could take up to 1.4s to occur. this feature is useful if the application uses more than one cell type and the ic must be reconfigured at each insertion. fast detection of cell removal the device can be configured to quickly alert the host of impending power loss on cell removal. this fast response allows the system to quickly and gracefully hibernate to prevent power loss during battery swap. when ber = 1 and fthrm = 1 in the config register, an interrupt on the alrt pin is generated within 100 f s after v ain becomes greater than v thrm - v detr . if fast detection is used, it is recommended that all other ic interrupts are disabled to prevent the host from spending time determining the cause of the interrupt. fast detection of cell removal has no affect on fuel-gauge operation, but leaving the exter - nal resistor-divider active increases current consumption of the application. see figure 39 . modes of operation the device operates in one of two power modes: active and shutdown. while in active mode, the device oper - ates as a high-precision battery monitor with tempera - ture, voltage, auxiliary inputs, current, and accumulated current measurements acquired continuously, and the resulting values updated in the measurement registers. read and write access is allowed only in active mode. in shutdown mode, the ldo is disabled and all activ - ity stops, although volatile ram contents remain pre - served . all a/d register and fuel-gauge output values are maintained. there are several options for entering shutdown: entering shutdown: ? shutdown command write the config register shdn = 1 through the i 2 c interface; wait for longer than the shdntimer register value. ? pack removal pack removal detection is valid for longer than the shdntimer register value and the config register ainsh = 1. ? i 2 c shutdown i 2 c lines both persist low for longer than the shdntimer register value and the config register i2csh = 1. ? alrt shutdown shutdown occurs when the alrt line is externally driven low for longer than the shdntimer register value (alsh = 1 and alrtp = 0), or the alrt line is externally driven high for longer than the shdntimer register value (alsh = 1 and alrtp = 1). see the config register (1dh) section. cell removal (ber = 1, fthrm = 1) v batt ain cell removal interrupt generated < 100s alrt output
???????????????????????????????????????????????????????????????? maxim integrated products 31 max17047/max17050 modelgauge m3 fuel gauge figure 40. device state based on shutdown exit condition these shutdown entry modes are all programmable according to application. shutdown events are gated by the shdntimer register, which allows a long delay between the shutdown event and the actual shutdown. by behaving this way, the device takes the best reading of the relaxation voltage. exiting shutdown: ? i 2 c wakeup any edge on scl/sda. ? alrt wakeup any edge on alrt line and (alsh = 1 or i2csh = alsh = 0). ? reset ic is power cycled. see the status and configuration section for detailed descriptions of the shdntimer and config registers. the state of the device when returning to active mode differs depending on the triggering event. see figure 40 . host software can monitor the por and bi status bits to determine what type of event has occurred. alrt function the alert threshold registers allow interrupts to be generated by detecting a high or low voltage, a high or low temperature, or a high or low soc. interrupts are generated on the alrt pin open-drain output driver. an external pullup is required to generate a logic-high sig - nal. note that if the pin is configured to be logic-low when inactive, the external pullup increases current drain. the alrtp bit in the config register sets the polarity of the alrt pin output. alerts can be triggered by any of the following conditions: ? battery removal (v ain > v thrm - v detr ) and bat - tery removal detection enabled (ber = 1). ? battery insertion (v ain < v thrm - v detf ) and bat - tery insertion detection enabled (bei = 1). ? over-/undervoltage v alrt threshold violation (upper or lower) and alerts enabled (aen = 1). ? over-/undertemperature t alrt threshold violation (upper or lower) and alerts enabled (aen = 1). ? over/under soc s alrt threshold violation (upper or lower) and alerts enabled (aen = 1). to prevent false interrupts, the threshold registers should be initialized before setting the aen bit. alerts generated by battery insertion or removal can only be reset by clearing the corresponding bit in the status register. alerts gener - ated by a threshold-level violation can be configured to be cleared only by software, or cleared automatically when the threshold level is no longer violated. see the config (1dh) register description for details of the alert function configuration. battery insertion detected (thrm comparator recognizes change from removal to inserted state) dnr = 1 bi = 0 por = 1 fuel gauge reset maxminvoltage register (1bh) reset cycles register (17h) reset all other ram values maintained all ram values maintained fuel gauge restarts from point maintained when shutdown was entered all ram reset to default values fuel gauge reset power-on reset (recovery from power loss ) wake from shutdown stat e (i 2 c edge or alrt edge detected) event action status indicators dnr = 1 bi = 1 por = unchanged dnr = 0 bi = unchanged por = unchanged
???????????????????????????????????????????????????????????????? maxim integrated products 32 max17047/max17050 modelgauge m3 fuel gauge figure 41. v alrt threshold register format (input) figure 42. t alrt threshold register format (input) v alrt threshold register (01h) the v alrt threshold register ( figure 41 ) sets upper and lower limits that generate an alrt pin interrupt if exceeded by the v cell register value. the upper 8 bits set the maximum value and the lower 8 bits set the minimum value. interrupt threshold limits are selectable with 20mv resolution over the full operating range of the v cell register. at power-up, the thresholds default to their maximum settingsff00h (disabled). t alrt threshold register (02h) the t alrt threshold register sets upper and lower limits that generate an alrt pin interrupt if exceeded by the temperature register value. the upper 8 bits set the max - imum value and the lower 8 bits set the minimum value. interrupt threshold limits are stored in twos-complement format and are selectable with 1 n c resolution over the full operating range of the temperature register. at power- up, the thresholds default to their maximum settings 7f80h (disabled). figure 42 shows the t alrt threshold register format. s alrt threshold register (03h) the s alrt threshold register ( figure 43 ) sets upper and lower limits that generate an alrt pin interrupt if exceeded by the selected soc rep , soc av , soc mix , or soc vf register values. see the sacfg bits in the misccfg register description for details. the upper 8 bits set the maximum value and the lower 8 bits set the minimum value. interrupt threshold limits are selectable with 1% resolution over the full operating range of the selected soc register. at power-up, the thresholds default to their maximum settingsff00h (disabled). figure 43. s alrt threshold register format (input) msbaddress 01h lsbaddress 01h max 7 max 6 max 5 max 4 max 3 max 2 max 1 max 0 min 7 min 6 min 5 min 4 min 3 min 2 min 1 min 0 msb lsb msb lsb units: 20mv msbaddress 02h lsbaddress 02h s max 6 max 5 max 4 max 3 max 2 max 1 max 0 s min 6 min 5 min 4 min 3 min 2 min 1 min 0 msb lsb msb lsb units: 1 n c msbaddress 03h lsbaddress 03h max 7 max 6 max 5 max 4 max 3 max 2 max 1 max 0 min 7 min 6 min 5 min 4 min 3 min 2 min 1 min 0 msb lsb msb lsb units: 1%
???????????????????????????????????????????????????????????????? maxim integrated products 33 max17047/max17050 modelgauge m3 fuel gauge figure 44. config register format (input) status and configuration the following registers control operation of the alrt inter - rupt feature, control transition between active and shut - down modes of operation, and provide status updates to the host processor. config register (1dh) the config register holds all shutdown enable, alert enable, and temperature enable control bits. writing a bit location enables the corresponding function within a 175.8ms task period. figure 44 shows the config register format. 0 bit must be written 0. do not write 1. ber enable alert on battery removal. when ber = 1, a battery-removal condition, as detected by the ain pin voltage, triggers an alert. set to 0 at power-up. note that if this bit is set to 1, the alsh bit should be set to 0 to prevent an alert condition from causing the device to enter shutdown mode. bei enable alert on battery insertion. when bei = 1, a battery-insertion condition, as detected by the ain pin voltage, triggers an alert. set to 0 at power-up. note that if this bit is set to 1, the alsh bit should be set to 0 to prevent an alert condition from causing the device to enter shutdown mode. aen enable alert on fuel-gauge outputs. when aen = 1, violation of any of the alert threshold register values by temperature, voltage, or soc triggers an alert. this bit affects the alrt pin operation only. the smx, smn, tmx, tmn, vmx, and vmn bits are not disabled. this bit is set to 0 at power-up. note that if this bit is set to 1, the alsh bit should be set to 0 to prevent an alert condition from causing the device to enter shutdown mode. fthrm force thermistor bias switch. this allows the host to control the bias of the thermistor switch or enable fast detection of battery removal (see the fast detection of cell removal section). set fthrm = 1 to always enable the thermistor bias switch. with a standard 10k i thermistor, this adds an additional ~200 f a to the current drain of the circuit. this bit is set to 0 at power-up. ethrm enable thermistor. set to logic 1 to enable the automatic thrm output bias and ain measurement every 1.4s. this bit is set to 1 at power-up. alsh alrt shutdown. set to logic 1 and clear the aen, ber, and bei bits to configure the alrt pin as an input to control shutdown mode of the device. the device enters shutdown if the alrt pin is held active for longer than timeout of the shdntimer register. the device enters active mode immediately on the opposite edge of the alrt pin. when set to logic 0, the alrt pin can func - tion as an interrupt output. this bit is set to 0 at power-up. note that if this bit is set to 1, the bei, ber, and aen bits should be set to 0 to prevent an alert condition from caus - ing the device to enter shutdown mode. i2csh i 2 c shutdown. set to logic 1 to force the device to enter shutdown mode if both sda and scl are held low for more than timeout of the shdntimer register. this also configures the device to wake up on a rising edge of either sda or scl. set to 1 at power-up. note that if i2sch and ainsh are both set to 0, the device wakes up an edge of any of the sda, scl, or alrt pins. shdn shutdown. write this bit to logic 1 to force a shutdown of the device after timeout of the shdntimer register. shdn is reset to 0 at power-up and upon exiting shutdown mode. tex temperature external. when set to 1, the fuel gauge requires external temperature measurements to be written from the host. when set to 0, measurements on the ain pin are converted to a temperature value and stored in the temperature register instead. tex is set to 1 at power-up. ten enable temperature channel. set to 1 and set ethrm or fthrm to 1 to enable measurements on the ain pin. ten is set to 1 at power-up. msbaddress 1dh lsbaddress 1dh 0 s s t s v s alrtp ainsh ten tex shdn i2csh alsh ethrm fthrm aen bei ber msb lsb msb lsb
???????????????????????????????????????????????????????????????? maxim integrated products 34 max17047/max17050 modelgauge m3 fuel gauge figure 46. shdntimer register format (input/output) figure 45. timer register format (output) ainsh ain pin shutdown. set to 1 to enable device shut - down when the battery is removed. the ic enters shutdown if the ain pin remains high (ain reading > v thrm - v detr ) for longer than the timeout of the shdntimer register. this also configures the device to wake up when ain is pulled low on cell insertion. ainsh is set to 0 at power-up. note that if i2sch and ainsh are both set to 0, the device wakes up an edge of any of the sda, scl, or alrt pins. alrtp alrt pin polarity. regardless if alrt is being used as an input or output, if alrtp = 0, the alrt pin is active low; if alrtp = 1, the alrt pin is active high. alrtp is set to 0 at power-up. v s voltage alrt sticky. when v s = 1, voltage alerts can only be cleared through software. when v s = 0, volt - age alerts are cleared automatically when the threshold is no longer exceeded. v s is set to 0 at power-up. t s temperature alrt sticky. when t s = 1, tempera - ture alerts can only be cleared through software. when t s = 0, temperature alerts are cleared automatically when the threshold is no longer exceeded. t s is set to 1 at power-up. s s soc alrt sticky. when s s = 1, soc alerts can only be cleared through software. when s s = 0, soc alerts are cleared automatically when the threshold is no longer exceeded. s s is set to 0 at power-up. timer register (3eh) this register holds timing information for the fuel gauge. it is available to the user for debug purposes. figure 45 shows the timer register format. shdntimer register (3fh) the shdntimer register sets the timeout period from when a shutdown event is detected until the device disables the ldo and enters low-power mode. figure 46 shows the shdntimer register format. ctr12:ctr0 shutdown counter. this register counts the total amount of elapsed time since the shutdown trig - ger event. this counter value stops and resets to 0 when the shutdown timeout completes. the counter lsb is 1.4s. thr2:thr0 sets the shutdown timeout period from a minimum of 45s to a maximum of 1.6h. the default por value of 7h gives a shutdown delay of 1.6h. the equation setting the period is: shutdown timeout period = 175.8ms o 2 (8+thr) msbaddress 3fh lsbaddress 3fh thr 2 thr 1 thr 0 ctr 12 ctr 11 ctr 10 ctr 9 ctr 8 ctr 7 ctr 6 ctr 5 ctr 4 ctr 3 ctr 2 ctr 1 ctr 0 msb lsb msb lsb msbaddress 3eh lsbaddress 3eh 2 15 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: 175.8ms
???????????????????????????????????????????????????????????????? maxim integrated products 35 max17047/max17050 modelgauge m3 fuel gauge figure 47. status register format (input/output) status register (00h) the status register maintains all flags related to alert thresholds and battery insertion or removal. figure 47 shows the status register format. por power-on reset. this bit is set to a 1 when the device detects that a software or hardware por event has occurred. if the host detects that the por bit has been set, the device should be reconfigured. see the power-up and power-on reset section. this bit must be cleared by system software to detect the next por event. por is set to 1 at power-up. bst battery status. this bit is set to 0 when a battery is present in the system and set to 1 when the battery is removed. bst is set to 0 at power-up. vmn minimum v alrt threshold exceeded. this bit is set to a 1 whenever a v cell register reading is below the minimum v alrt value. this bit may or may not need to be cleared by system software to detect the next event. see v s in the config register. vmn is set to 0 at power-up. tmn minimum t alrt threshold exceeded. this bit is set to a 1 whenever a temperature register reading is below the minimum t alrt value. this bit may or may not need to be cleared by system software to detect the next event. see t s in the config register. tmn is set to 0 at power-up. smn minimum soc alrt threshold exceeded. this bit is set to a 1 whenever soc falls below the minimum soc alrt value. this bit may or may not need to be cleared by system software to detect the next event. see s s in the config register and sacfg in the misccfg register. smn is set to 0 at power-up. bi battery insertion. this bit is set to a 1 when the device detects that a battery has been inserted into the system by monitoring the ain pin. this bit must be cleared by system software to detect the next insertion event. bi is set to 0 at power-up. vmx maximum v alrt threshold exceeded. this bit is set to a 1 whenever a v cell register reading is above the maximum v alrt value. this bit may or may not need to be cleared by system software to detect the next event. see v s in the config register. vmx is set to 0 at power-up. tmx maximum t alrt threshold exceeded. this bit is set to a 1 whenever a temperature register reading is above the maximum t alrt value. this bit may or may not need to be cleared by system software to detect the next event. see t s in the config register. tmx is set to 0 at power-up. smx maximum soc alrt threshold exceeded. this bit is set to a 1 whenever soc rises above the maximum soc alrt value. this bit may or may not need to be cleared by system software to detect the next event. see s s in the config register and sacfg in the misccfg register. smx is set to 0 at power-up. br battery removal. this bit is set to a 1 when the device detects that a battery has been removed from the system. this bit must be cleared by system software to detect the next removal event. br is set to 0 at power-up. x dont care. this bit is undefined and can be logic 0 or 1. msbaddress 00h lsbaddress 00h br smx tmx vmx bi smn tmn vmn x x x x bst x por x msb lsb msb lsb
???????????????????????????????????????????????????????????????? maxim integrated products 36 max17047/max17050 modelgauge m3 fuel gauge version register (21h) the version register holds a 16-bit value that indicates the version of the device. figure 48 shows the version register format. voltage measurement while in active mode, the device periodically measures the voltage between the v batt and csp pins over a 2.5v to 4.98v range. the resulting data is placed in the v cell register every 175.8ms with an lsb value of 0.625mv. additionally, the device maintains a record of the mini - mum and maximum voltage measured by the device, and an average voltage over a time period defined by the host. contents of the v cell and averagev cell registers are indeterminate for the first conversion cycle time period after device power-up. the last values of the v cell and averagev cell registers are maintained when the device enters shutdown mode. v cell register (09h) while in active mode, the device periodically measures the voltage between the v batt and csp pins over a 0 to 4.98v range. the resulting data is placed in the v cell register every 175.8ms with an lsb value of 0.625mv. voltages above the maximum register value are reported as the maximum value. the lower 3 bits of the v cell register are dont care bits. figure 49 shows the v cell register format. averagev cell register (19h) the averagev cell register reports an average of v cell register readings over a configurable 12s to 24min time period. see the filtercfg register description for details on setting the time filter. the resulting average is placed in the averagev cell register with an lsb value of 0.625mv. the lower 3 bits of the averagev cell register are dont care bits.the first v cell register reading after device power- up sets the starting point of the averagev cell filter. note that when a cell relaxation event is detected, the averag - ing period for the averagev cell register changes to the period defined by dt3:dt0 in the relaxcfg register. the averagev cell register reverts back to its normal averag - ing period when a charge or discharge current is detect - ed. figure 50 shows the averagev cell register format. figure 48. version register format (output) figure 49. v cell register format (output) figure 50. averagev cell register format (output) msbaddress 21h lsbaddress 21h v 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v 5 v 4 v 3 v 2 v 1 v 0 msb lsb msb lsb msbaddress 09h lsbaddress 09h 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 x x x msb lsb msb lsb units: 0.625mv msbaddress 19h lsbaddress 19h 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 x x x msb lsb msb lsb units: 0.625mv
???????????????????????????????????????????????????????????????? maxim integrated products 37 max17047/max17050 modelgauge m3 fuel gauge figure 51. maxminv cell register format (output) maxminv cell register (1bh) the maxminv cell register maintains the maximum and minimum v cell register values since the last fuel-gauge reset or until reset by the host software. each time the v cell register updates, it is compared against these values. if v cell is larger than the maximum or less than the minimum, the corresponding value is replaced with the new reading. at power-up, the maxv cell value is set to 00h (the minimum) and the minv cell value is set to ffh (the maximum). therefore, both values are changed to the v cell register reading after the first update. host software can reset this register by writing it to its power- up value of 00ffh. the maximum and minimum voltages are each stored as 8-bit values with a 20mv resolution. figure 51 shows the maxminv cell register format. current measurement while in active mode, the device periodically measures the voltage between the csn and csp pins over a q 51.2mv range. the resulting data is stored as a signed twos-complement value in the current register every 175.8ms with an lsb value of 1.5625 f v/r sense . all devices are calibrated for current-measurement accu - racy at the factory. however, if the application requires, current register readings can be adjusted by changing the coff and cgain register settings. additionally, the device maintains a record of the mini - mum and maximum current measured by the device, and an average current over a time period defined by the host. contents of the current and averagecurrent registers are 0000h until the first conversion cycle time period after ic power-up. the last values of the current and averagecurrent registers are maintained when the ic enters shutdown mode. current register (0ah) while in active mode, the device periodically measures the voltage between the csn and csp pins over a q 51.2mv range. the resulting data is stored as a twos-complement value in the current register every 175.8ms with an lsb value of 1.5625 f v/r sense . voltages outside the minimum and maximum register values are reported as the minimum or maximum value. figure 52 shows the current register format and table 3 shows the sample current register conversions. table 3. sample current register conversions function sense resistor ( i ) cgain register current register resolution (a) current register range (a) maximum cell capacity (ah) adjusting sense resistor to meet range and accuracy requirements 0.005 4000h 312.50 q 10.24 32.768 0.010 4000h 156.25 q 5.12 16.384 0.020 4000h 78.125 q 2.56 8.192 adjusting cgain to keep units constant 0.005 7fffh 156.25 q 5.12 16.384 0.010 4000h 156.25 q 5.12 16.384 0.020 2000h 156.25 q 5.12 16.384 msbaddress 1bh lsbaddress 1bh max 7 max 6 max 5 max 4 max 3 max 2 max 1 max 0 min 7 min 6 min 5 min 4 min 3 min 2 min 1 min 0 msb lsb msb lsb units: 20mv
???????????????????????????????????????????????????????????????? maxim integrated products 38 max17047/max17050 modelgauge m3 fuel gauge figure 54. maxmincurrent register format (output) figure 53. averagecurrent register format (output) averagecurrent register (0bh) the averag ecurrent register reports an average of current-register readings over a configurable 0.7s to 6.4h time period. see the filtercfg register descrip - tion for details on setting the time filter. the resulting average is placed in the averagecurrent register with an lsb value of 1.5625 f v/r sense . the first current register reading after device power-up sets the start - ing point of the averagecurrent filter. the last value of the averagecurrent register is maintained when the device enters shutdown mode. figure 53 shows the a veragecurrent register format. maxmincurrent register (1ch) the max mincurrent register maintains the maximum and minimum current register values since the last fuel gauge reset or until cleared by host software. each time the current register updates, it is compared against these values. if the reading is larger than the maximum or less than the minimum, the corresponding value is replaced with the new reading. at power-up, the maxcurrent value is set to 80h (the minimum) and the mincurrent value is set to 7fh (the maximum). therefore, both values are changed to the current register reading after the first update. host software can reset this register by writing it to its power-up value of 807fh. the maximum and mini - mum voltages are each stored as twos-complement 8-bit values with 0.4mv/r sense resolution. figure 54 shows the maxmincurrent register format. cgain register (2eh)/coff register (2fh) the cgain and coff registers adjust the gain and off - set of the current measurement result. the current mea - surement a/d is factory trimmed to data-sheet accuracy without the need for the user to make further adjustments. the default power-up settings for cgain and coff apply no adjustments to the current register reading. for specific application requirements, the cgain and coff registers can be used to adjust readings as follows: current register = current a/d reading o (cgain register/16384) + (2 o coff register) for easiest software compatibility between systems, configure cgain to keep current lsb resolution at 0.15625ma. a minimum sense resistance of 0.005 i is required due to the maximum range of cgain. this preserves resolution of current readings and capacities. figure 52. current register format (output) msbaddress 1ch lsbaddress 1ch s max 6 max 5 max 4 max 3 max 2 max 1 max 0 s min 6 min 5 min 4 min 3 min 2 min 1 min 0 msb lsb msb lsb units: 0.4mv/r sense msbaddress 0bh lsbaddress 0bh s 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb units: 1.5625 f v/r sense msbaddress 0ah lsbaddress 0ah s 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb units: 1.5625 f v/r sense
???????????????????????????????????????????????????????????????? maxim integrated products 39 max17047/max17050 modelgauge m3 fuel gauge table 4. recommended tgain and toff register values for common ntc thermistors figure 55. cgain register format (input) figure 56. coff register format (input) both these registers are signed twos complement. the default values of 4000h for cgain and 0000h for coff preserve factory calibration and unit values (1.5625 f v). figure 55 shows the cgain register format and figure 56 shows the coff register format. temperature measurement while in active mode and ten = 1 in the config register, the device periodically measures the voltage between the ain and csp pins and compares the result to the volt - age of the thrm pin. the device stores the result, a ratio - metric value from 0 to 100%. the resulting data is placed in the ain register every 1.4s with an lsb of 0.0122%. conversions are initiated by connecting the thrm and vtt pins internally. this enables the active pullup to the external voltage-divider network. after the pullup is enabled, the device waits for a settling period of t pre prior to making measurements on the ain pin. when ethrm = 1, fthrm = 0, the active pullup is disabled when temperature measurements are complete. this fea - ture limits the time the external resistor-divider network is active and lowers the total amount of energy used by the system. when tex = 0 and ten = 1 in the config register, the device converts the ain register to a temperature using the temperature gain (tgain) and temperature offset (toff) register values: temperature register = (ain register o tgain register/16384) + (toff register o 2) the resulting value is stored in the temperature register each time the ain register is updated. additionally, the device maintains a record of the minimum and maximum temperature measured by the device, and an average temperature over a time period defined by the host. table 4 lists the recommended tgain and toff register values for common ntc thermistors. thermistor r 25c (k i ) beta recommended tgain recommended toff semitec 103at-2 10 3435 e3e1h 290eh fenwal 197-103lag-a01 10 3974 e71ch 251ah tdk type f 10 4550 e989h 22b1h msbaddress 2eh lsbaddress 2eh s 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10 2 -11 2 -12 2 -13 2 -14 msb lsb msb lsb 2 0 units: 0.0061% msbaddress 2fh lsbaddress 2fh s 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb units: 3.125 f v/r sense
???????????????????????????????????????????????????????????????? maxim integrated products 40 max17047/max17050 modelgauge m3 fuel gauge figure 57. ain register format (output) figure 58. temperature register format (input/output) when tex = 1 in the config register, the device does not update the temperature register based on results from the ain pin a/d. instead, host software must peri - odically write the temperature register with the known application temperature to keep the fuel gauge accurate. ain register (27h) while in active mode and ten = 1 in the config register, the device periodically measures the voltage between pins ain and csp and compares the result to the voltage of the thrm pin. the device stores the result, a ratiomet - ric value from 0 to 100%. the resulting data is placed in the ain register every 1.4s with an lsb of 0.0122%. contents of the ain register are indeterminate for the first conversion cycle time period after device power-up. the last value of the ain register is maintained when the device enters shutdown mode or if ten = 0 in the config register. figure 57 shows the ain register format. temperature register (08h) while in active mode and tex = 0 and ten = 1 in the config register, the device converts the ain regis - ter value into a signed twos-complement temperature value. see the tgain and toff configuration registers. the resulting data is placed in the temperature register every 1.4s with a resolution of +0.0039 n c. if an 8-bit temperature reading is desired, the host can read only the upper byte of the temperature register with a resolu - tion of +1.0 n c. contents of the temperature register are indeterminate for the first conversion cycle time period after device power-up. the last value of the temperature register is maintained when the device enters shutdown mode. figure 58 shows the temperature register format. averagetemperature register (16h) the averagetemperature register reports an average of temperature register readings over a configurable 6min to 12h time period. see the filtercfg register ( 29h) description for details on setting the time filter. the result - ing average is placed in the averagetemperature regis - ter with an lsb value of 0.0039 n c. the first temperature register reading after device power-up sets the starting point of the averagetemperature filter. the last value of the averagetemperature register is maintained when the device enters shutdown mode. figure 59 shows the averagetemperature register format. figure 59. averagetemperature register format (output) msbaddress 27h lsbaddress 27h 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 2 -9 2 -10 2 -11 2 -12 2 -13 x x x msb lsb msb lsb 2 -13 units: 0.0122% msbaddress 08h lsbaddress 08h s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 -8 units: +0.0039 n c 2 0 units: +1.0 n c msbaddress 16h lsbaddress 16h s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 2 -8 msb lsb msb lsb 2 -8 units: +0.0039 n c 2 0 units: +1.0 n c
???????????????????????????????????????????????????????????????? maxim integrated products 41 max17047/max17050 modelgauge m3 fuel gauge figure 61. tgain register format (input) figure 60. maxmintemperature register format (output) maxmintemperature register (1ah) the maxmintemperature register maintains the maxi - mum and minimum temperature register values since the last fuel-gauge reset or until cleared by host software. each time the temperature register updates, it is com - pared against these values. if the reading is larger than the maximum or less than the minimum, the correspond - ing values are replaced with the new reading. at power- up, the maxtemperature value is set to 80h (minimum) and the mintemperature value is set to 7fh (maximum). therefore, both values are changed to the temperature register reading after the first update. host software can reset this register by writing it to its power-up value of 807fh. the maximum and minimum temperatures are each stored as twos complement 8-bit values with 1 n c resolution. figure 60 shows the maxmintemperature register format. tgain register (2ch)/toff register (2dh) the tgain and toff registers adjust the gain and offset of the temperature measurement a/d on the ain pin to convert the result to a temperature value by the following equation: temperature register = (ain register o tgain register/16384) + (toff register o 2) both these registers are signed twos complement. these registers allow for accurate temperature conversions when using a variety of external ntc thermistors (see table 4 ). figure 61 shows the tgain register format and figure 62 shows the toff register format. ic memory map the device has a 256-word linear memory space con - taining all user-accessible registers. all registers are 16 bits wide and are read and written as 2-byte values. when the msb of a register is read, the msb and lsb are latched simultaneously and held for the duration of the read data command. this prevents updates to the lsb during the read, ensuring synchronization between the 2 register bytes. all locations are volatile ram and lose their data in the event of power loss. data is retained during device shutdown. each register has a power-on-reset value that it defaults to at power-up. word addresses designated as reserved return an undetermined when read. these locations should not be written. msbaddress 2ch lsbaddress 2ch s 2 14 2 13 2 12 2 11 2 10 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb msb lsb 2 0 units: +1 n c/64 msbaddress 1ah lsbaddress 1ah s max 6 max 5 max 4 max 3 max 2 max 1 max 0 s min 6 min 5 min 4 min 3 min 2 min 1 min 0 msb lsb msb lsb units: +1 n c
???????????????????????????????????????????????????????????????? maxim integrated products 42 max17047/max17050 modelgauge m3 fuel gauge table 5. device memory map figure 62. toff register format (input) address (hex) register name a/d measure alert/ status mg m3 app data mg m3 cell data mg m3 config mg m3 save and restore mg m3 output por value read/ write 00h status 0002h r/w 01h v alrt threshold ff00h r/w 02h t alrt threshold 7f80h r/w 03h s alrt threshold ff00h r/w 04h atrate 0000h r/w 05h remcap rep 03e8h r 06h soc rep 3200h r 07h age 6400h r 08h temperature 1600h r/w 09h v cell b400h r 0ah current 0000h r 0bh averagecurrent 0000h r 0ch reserved 0dh soc mix 3200h r 0eh soc av 3200h r 0fh remcap mix 03e8h r 10h fullcap 07d0h r/w 11h tte 0000h r 12h qresidual 00 1e2fh r/w 13h fullsocthr 4600h r/w 14hC15h reserved 16h averagetemperature 1600h r 17h cycles 0000h r/w 18h designcap 07d0h r/w 19h averagev cell b400h r 1ah maxmintemperature 807fh r/w 1bh maxminv cell 00ffh r/w 1ch maxmincurrent 807fh r/w 1dh config 2350h r/w 1eh ichgterm 03c0h r/w 1fh remcap av 03e8h r 20h reserved 21h version 00ach r msbaddress 2dh lsbaddress 2dh s 2 6 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 2 -5 2 -6 2 -7 msb lsb msb lsb 2 -7 units: +0.0078 n c
???????????????????????????????????????????????????????????????? maxim integrated products 43 max17047/max17050 modelgauge m3 fuel gauge table 5. device memory map (continued) address (hex) register name a/d measure alert/ status mg m3 app data mg m3 cell data mg m3 config mg m3 save and restore mg m3 output por value read/ write 22h qresidual 10 1e00h r/w 23h fullcapnom 07d0h r/w 24h tempnom 1400h r/w 25h templim 2305h r/w 26h reserved 27h ain 88d0h r 28h learncfg 2602h r/w 29h filtercfg 4ea4h r/w 2ah relaxcfg 203bh r/w 2bh misccfg 0870h r/w 2ch tgain e3e1h r/w 2dh toff 290eh r/w 2eh cgain 4000h r/w 2fh coff 0000h r/w 30hC31h reserved 32h qresidual 20 1306h r/w 33hC35h reserved 36h iavg_empty 0780h r/w 37h fctc 05e0h r/w 38h rcomp0 004bh r/w 39h tempco 262bh r/w 3ah v_empty 9c5ch r/w 3bh reserved 3ch reserved 3dh fstat 0001h r 3eh timer 0000h r 3fh shdntimer e000h r/w 40hC41h reserved 42h qresidual 30 0c00h r/w 43hC44h reserved 45h dqacc 007dh r/w 46h dpacc 0c80h r/w 47hC4ch reserved 4dh qh 0000h r/w 4ehC7fh reserved 80hCafh characterization table n/a r/w b0hCfah reserved fbh vfocv 0000h r fchCfeh reserved ffh soc vf 0000h r
???????????????????????????????????????????????????????????????? maxim integrated products 44 max17047/max17050 modelgauge m3 fuel gauge 2-wire bus system the 2-wire bus system supports operation as a slave- only device in a single or multislave, and single or multimaster system. up to 128 slave devices may share the bus by uniquely setting the 7-bit slave address. the 2-wire interface consists of a serial data line (sda) and serial clock line (scl). sda and scl provide bidirec - tional communication between the ic (slave device) and a master device at speeds up to 400khz. the devices sda pin operates bidirectionally, that is, when the device receives data, sda operates as an input, and when the device returns data, sda operates as an open-drain out - put, with the host system providing a resistive pullup. the device always operates as a slave device, receiving and transmitting data under the control of a master device. the master initiates all transactions on the bus and gen - erates the scl signal, as well as the start and stop bits, which begin and end each transaction. bit transfer one data bit is transferred during each scl clock cycle, with the cycle defined by scl transitioning low to high and then high to low. the sda logic level must remain stable during the high period of the scl clock pulse. any change in sda when scl is high is interpreted as a start or stop control signal. bus idle the bus is defined to be idle, or not busy, when no mas - ter device has control. both sda and scl remain high when the bus is idle. the stop condition is the proper method to return the bus to the idle state. start and stop conditions the master initiates transactions with a start condition (s), by forcing a high-to-low transition on sda while scl is high. the master terminates a transaction with a stop condition (p), a low-to-high transition on sda while scl is high. a repeated start condition (sr) can be used in place of a stop then start sequence to terminate one transaction and begin another without returning the bus to the idle state. in multimaster systems, a repeated start allows the master to retain control of the bus. the start and stop conditions are the only bus activities in which the sda transitions when scl is high. acknowledge bits each byte of a data transfer is acknowledged with an acknowledge bit (a) or a no acknowledge bit (n). both the master and the device slave generate acknowledge bits. to generate an acknowledge, the receiving device must pull sda low before the rising edge of the acknowl - edge-related clock pulse (ninth pulse) and keep it low until scl returns low. to generate a no acknowledge (also called nack), the receiver releases sda before the rising edge of the acknowledge-related clock pulse and leaves sda high until scl returns low. monitoring the acknowledge bits allows for detection of unsuccess - ful data transfers. an unsuccessful data transfer can occur if a receiving device is busy or if a system fault has occurred. in the event of an unsuccessful data transfer, the bus master should reattempt communication. data order a byte of data consists of 8 bits ordered most significant bit (msb) first. the least significant bit (lsb) of each byte is followed by the acknowledge bit. device registers composed of multibyte values are ordered least signifi - cant byte (lsb) first. slave address a bus master initiates communication with a slave device by issuing a start condition followed by a slave address (saddr) and the read/write (r/w) bit. when the bus is idle, the device continuously monitors for a start condition followed by its slave address. when the device receives a slave address that matches the value in its programmable slave address register, it responds with an acknowledge bit during the clock period following the r/w bit. the 7-bit programmable slave address register is factory pro - grammed and cannot be changed by the user. ic slave address 0110110 read/write bit the r/w bit following the slave address determines the data direction of subsequent bytes in the transfer. r/w = 0 selects a write transaction, with the following bytes being written by the master to the slave. r/w = 1 selects a read transaction, with the following bytes being read from the slave by the master. bus timing the device is compatible with any bus timing up to 400khz. no special configuration is required to operate at any speed. 2-wire command protocols the command protocols involve several transaction formats. the simplest format consists of the master writing the start bit, slave address, r/w bit, and then
???????????????????????????????????????????????????????????????? maxim integrated products 45 max17047/max17050 modelgauge m3 fuel gauge table 6. 2-wire protocol key monitoring the acknowledge bit for presence of the device. more complex formats such as the write data, read data, and function command protocols write data, read data, and execute device-specific operations, respectively. all bytes in each command format require the slave or the host system to return an acknowledge bit before continuing with the next byte. each function com - mand definition outlines the required transaction format. table 6 applies to the transaction formats. basic transaction formats write: s saddr w a maddr a datal a datah a p a write transaction transfers 1 or more data bytes to the device. the data transfer begins at the memory address supplied in the maddr byte. control of the sda signal is retained by the master throughout the transaction, except for the acknowledge cycles. read: s saddr w a maddr a sr saddr r a datal a datah n p write portion read portion a read transaction transfers one or more words from the ic. read transactions are composed of two parts, a write portion followed by a read portion, and are therefore inherently longer than a write transaction. the write por - tion communicates the starting point for the read opera - tion. the read portion follows immediately, beginning with a repeated start, slave address with r/w set to a 1. control of sda is assumed by the ic beginning with the slave address acknowledge cycle. control of the sda signal is retained by the device throughout the transac - tion, except for the acknowledge cycles. the master indicates the end of a read transaction by responding to the last byte it requires with a no acknowledge. this signals the device that control of sda is to remain with the master following the acknowledge clock. write data protocol the write data protocol is used to write to register and shadow ram data to the ic starting at memory address maddr. data0 represents the data written to maddr, data1 represents the data written to maddr + 1, and datan represents the last data byte written to maddr + n. the master indicates the end of a write transaction by sending a stop or repeated start after receiving the last acknowledge bit: s saddr w a maddr a datal0 a datah0 a datal1 a datah1 a dataln a datahn a p the msb of the data to be stored at address maddr can be written immediately after the maddr byte is acknowledged. because the address is automatically incremented after the least significant bit (lsb) of each byte is received by the device, the msb of the data at address maddr + 1 can be written immediately after the acknowledgment of the data at address maddr. if the bus master continues an autoincremented write transac - tion beyond address ffh, the device ignores the data. data is also ignored on writes to read-only addresses but not reserved addresses. do not write to reserved address locations. read data protocol the read data protocol is used to read register and shadow ram data from the device starting at memory address specified by maddr. data0 represents the data byte in memory location maddr, data1 represents the data from maddr + 1, and datan represents the last byte read by the master: s saddr w a maddr a sr saddr r a datal0 a datah0 a datal 1 a datah 1 a dataln n datahn n p data is returned beginning with the most significant bit (msb) of the data in maddr. because the address is automatically incremented after the lsb of each byte is returned, the msb of the data at address maddr + 1 is available to the host system immediately after the acknowledgment of the data at address maddr. if the bus master continues to read beyond address ffh, the device outputs data values of ffh. addresses labeled reserved in the memory map return undefined data. the bus master terminates the read transaction at any byte boundary by issuing a no acknowledge followed by a stop or repeated start. key description key description s start bit sr repeated start saddr slave address (7 bit) w r/w bit = 0 fcmd function command byte r r/w bit = 1 maddr memory address byte p stop bit data data byte written by master data data byte returned by slave a acknowledge bit master a acknowledge bit slave n no acknowledge master n no acknowledge slave
???????????????????????????????????????????????????????????????? maxim integrated products 46 max17047/max17050 modelgauge m3 fuel gauge package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. ordering information + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. * ep = exposed pad. part temp range pin-package max17047 g+ -40c to +85c 10 tdfn-ep* MAX17047G+t10 -40c to +85c 10 tdfn-ep* max17050 x+ -40c to +85c 9 wlp max17050x+t10 -40c to +85c 9 wlp package type package code outline no. land pattern no. 10 tdfn-ep t1033+1 21-0137 90-0003 9 wlp w91g1+1 21-0459 refer to application note 1891
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 47 ? 2012 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 9/11 initial release 1 12/11 added max17050 and added multicell application circuit information, updated schematics, ordering information , layout guideline, and t hermistor sharing circuit s ection 1, 7, 8, 11C41, 43, 45 2 4/12 corrected error on tdfn layout diagram in figure 8 and corrected error of hard- coded bits of the learncfg register 14, 25, 43 max17047/max17050 modelgauge m3 fuel gauge

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